Burn-in is known in the art of integrated circuits (ICs) as a test method used to stress an IC to detect early-life failures in the circuit, and provide a measure of performance reliability. However, during the stress-inducing process of burn-in, patterns used to exercise an IC (e.g., a microprocessor) in manufacturing are not necessarily representative of how that IC is exercised in the field (e.g., in use for one or more applications). This mismatch between field usage and burn-in leads to unrealistic stressing in the test phase, which can over-stress or under-stress the circuit.